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From: brandis@inf.ethz.ch (Marc Brandis)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: INFO ON NEW GATEWAY 2000 COMPUTERS??
Message-ID: <28625@neptune.inf.ethz.ch>
Date: 10 May 91 08:25:09 GMT
References: <11889@uwm.edu> <3370025@hpsgwp.sgp.hp.com>
Sender: news@neptune.inf.ethz.ch
Reply-To: brandis@inf.ethz.ch (Marc Brandis)
Organization: Departement Informatik, ETH, Zurich
Lines: 15

In article <3370025@hpsgwp.sgp.hp.com> plim@hpsgwp.sgp.hp.com (Peter Lim) writes:
>How ? Assuming the 20 MHz SX is running at zero wait state and the 20 MHz
>DX is running at 1 wait state. Given that SX take 2 cycle to fetch 32 bit
>and DX does that in 1 cycle, this would mean the SX running at the same
>speed as a DX. 

This is not completely correct. The 386 requires two (machine) cycles to
fetch a word (best case), so the values would be 3 cycles (2 + 1 wait state)
vs. 2 cycles. 


Marc-Michael Brandis
Computer Systems Laboratory, ETH-Zentrum (Swiss Federal Institute of Technology)
CH-8092 Zurich, Switzerland
email: brandis@inf.ethz.ch