Xref: utzoo comp.unix.xenix.sco:2509 comp.sys.ibm.pc.hardware:8595 Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!rex!samsung!olivea!mintaka!bloom-beacon!eru!hagbard!sunic!mcsun!ukc!uos-ee!thorin.ee.surrey.ac.uk!ees1lc From: ees1lc@thorin.ee.surrey.ac.uk (L N Chung) Newsgroups: comp.unix.xenix.sco,comp.sys.ibm.pc.hardware Subject: Re: 33 MHz 486 system for SCO Unix Message-ID: <1991May10.170758.29732@EE.Surrey.Ac.UK> Date: 10 May 91 17:07:58 GMT Sender: news@EE.Surrey.Ac.UK (Usenet News Service) Reply-To: ees1lc@thorin.ee.surrey.ac.uk (L N Chung) Organization: University of Surrey, Guildford, Surrey, UK. GU2 5XH Lines: 17 Many Thanks to everybody who reply to my query about SCO Unix systems. I would like to clear up one point: If SCO Unix does disk cacheing inside its kernel, does it mean it is pointless in using cacheing controller ? If so, how does SCO Unix support these controllers, does it just turn the cache off and use its own? What is the difference between "Track-at-a-time" controllers and cacheing ones? Will they do a better job. Thanks again. -------------------------------------------------------------------------- L.N. Chung Dept of Elec. Eng, University of Surrey, (ees1lc@ee.surrey.ac.uk) Guildford, Surrey, GU2 5XH. UK. (l.chung@ee.surrey.ac.uk) PHONE: +44 483 571281 FAX: +44 483 34139