Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!mips!dimacs.rutgers.edu!aramis.rutgers.edu!planchet.rutgers.edu!nanotech From: Howard.Landman@eng.sun.com (Howard A. Landman) Newsgroups: sci.nanotech Subject: Re: Drexler's talk at NASA AMES Keywords: error rate Message-ID: Date: 9 May 91 21:16:32 GMT Sender: nanotech@planchet.rutgers.edu Organization: Sun Microsystems, Mt. View, Ca. Lines: 30 Approved: nanotech@aramis.rutgers.edu In article Howard.Landman@eng.sun.com (Howard A. Landman) writes: >So assuming each unit executes one instruction (a very generous assumption), >we get 10^21 IPS * 10^-12 errors/I = 10^9 errors per second for a cm^3 size >supercomputer. Really reliable. :-) Josh replies: >[Seriously, though, 10^-12 > is a perfectly usable error rate for even the simplest error detecting > and correcting codes. A SECDED code would give you an average of > more than Avogadro's number of correct operations between detected > but uncorrected errors, and something like a million years between > undetected errors. Yes. But the high total error rate means that error correction and fault tolerance are REQUIRED features of any computer in that class. Traditional architectures don't cut it. Of course, since the MTBF is long enough to do a million million instructions (roughly what a 3,000 MIP machine could do in an hour!), for most simple tasks you could just rerun the job a few times and compare results. Also, there are some applications where reliability is a very low priority, such as real-time graphics/animation (if one frame gets a little screwed up it's not usually a big deal). A (nano-)processor per pixel, anyone? -- Howard A. Landman landman@eng.sun.com until Friday May 3, 1991 then at Crosspoint Solutions, (408) 988-1584 probably as landman@xpoint.com or uunet.uu.net!xpoint.com!landman