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From: pkl@ee.mu.OZ.AU (Peter  LAWREY)
Newsgroups: comp.arch
Subject: Re: Loop instructions
Message-ID: <1991May17.041509.19129@mulga.cs.mu.OZ.AU>
Date: 17 May 91 04:15:09 GMT
References: <41612@cup.portal.com> <63942@bbn.BBN.COM> <2518@m1.cs.man.ac.uk>
Sender: news@cs.mu.OZ.AU
Organization: University of Melbourne, EE Engineering
Lines: 41

In article <2518@m1.cs.man.ac.uk> mshute@cs.man.ac.uk (Malcolm Shute) writes:
>In article <63942@bbn.BBN.COM> pplacewa@bbn.com (Paul W Placeway) writes:
>>What I want in my processor is a zero-overhead-per-loop down-counting
>>loop instruction. 

Say we have an instruction loop[m] N. Where n is the number of instuctions in
the loop and N is the number of times the loop is executed. This is implimented
using two counters. One to keep track of the number of instructions to execute
and another to keep the loop counter. eg

	// A simplistic vector operation
	loop4		r7		// Variable length loop.
	load.32  	r4=[r1++]
	load.32 	r5=[r2++]
	fadd.s		r6=r5+r4
	store.32 	[r3++]=r6

	// Copy a byte character string.
	// Uses a break operator.
	loop3		r0		// Forever.
	load.8		r3=[r1++]
	store.8		[r2++]=r3
	break		r3==0

	// Wonderous numbers.
	// r1 contains the number to test.
	// r2 contains the number of loops.
	loop6		r0
	break		r1==1		// 1
	add		r2=r2+1		// 2
	and		r3=r1 & 0x0001	// 3
	bra		even,r3=0	// 4
	add		r3=r1+r1	// 5
	add		r1=r1+r3	// 6
even:	shl		r1=r1,1		// 5
	shl		r0=r0,r0	// 6
	// This however executes from the even label after finishing the loop
	// but it shows the versitility of the command.

These loops will have trouble with traps etc. as it represents a special mode
of execution.