Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!ut-emx!ibmchs!auschs!d75!exeter.austin.ibm.com!woan From: woan@exeter.austin.ibm.com (Ronald S Woan) Newsgroups: comp.arch Subject: Anything wrong with the i860 Message-ID: <3926@d75.UUCP> Date: 17 May 91 14:34:37 GMT References: <1991May16.221437.10751@rice.edu> <848@llnl.LLNL.GOV> Sender: news@d75.UUCP Reply-To: woan@cactus.org Organization: Austin School of Hardknocks Lines: 22 In article <848@llnl.LLNL.GOV> brooks@tazdevil.llnl.gov (Eugene D. Brooks III) writes: >In article <1991May16.221437.10751@rice.edu> preston@ariel.rice.edu (Preston Briggs) writes: >>The i860 can smoke a Sparc, but it takes a smart (mostly non-existant) >>compiler and the right applications. A man at Alliant charactarized >>the 860 as having a small "sweet spot". >The "sweet spot" of the i860, 4 K bytes, is indeed very small. That >the chip is so difficult to compile for indicates a poorly designed >architecture. I seriously doubt that by "sweet spot", he was referring to just the size of the cache which can't be directly compared across architectures based on just size as it matters how they are managed and replenished. Rather, I think he was referring to the complexity of coding for the i860's multiple processing units which I believe they expose to the software (not one of those supersmart superscalar out-of-order-execution guys). -- +-----All Views Expressed Are My Own And Are Not Necessarily Shared By------+ +------------------------------My Employer----------------------------------+ + Ronald S. Woan woan@cactus.org or woan@austin.vnet.ibm.com + + other email addresses Prodigy: XTCR74A Compuserve: 73530,2537 +