Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!unix.cis.pitt.edu!dsinc!bagate!cbmvax!daveh From: daveh@cbmvax.commodore.com (Dave Haynie) Newsgroups: comp.sys.amiga.hardware Subject: Re: HARDWARE HACK:2630 accellerator card in a Zorro II slot Message-ID: <21607@cbmvax.commodore.com> Date: 15 May 91 17:15:34 GMT References: <72302@microsoft.UUCP> Reply-To: daveh@cbmvax.commodore.com (Dave Haynie) Organization: Commodore, West Chester, PA Lines: 42 In article <72302@microsoft.UUCP> tom@microsoft.UUCP (Tom MCCONNELL) writes: >I have an opportunity to get a 2630 Commodore 68030 acclerator for >_cheap_! The only problem is I don't have a CPU slot! >But I DO have a fully compliant Zorro II slot. >Somewhere I heard about someone hacking a 2630 onto their expansion >port, which is essentially a different form of the Zorro slot, right? >Is it possible to do the same thing in a Zorro slot? Ok, here's the deal. The 86 pin edge on the A500 or A2000 is actually more similar to an A2000 coprocessor slot than a Zorro II slot. In fact, the A2000's coprocessor slot has nearly the same pinout as the "edge", only with a few more signals than available on the 86 pin edge. More importantly, it sits on the local bus (physically connected to the 68000) and, since no internal DMA device exist on 500s or 1000s, the 68000 can be overridden by a properly connected A2000 coprocessor card, even though the 500 or 1000 lack the full "coprocessor interface" of the 2000. The Zorro II bus doesn't provide the required signals to really manage the same kind of thing. Plus, there will be a set of buffers between any Zorro II slot and the local bus, which get in the way. The largest problem is that the Amiga systems aren't designed to be completely controlled by a Zorro II bus master. Zorro II doesn't get the full Paula managed interrupt lines, nor does it have a way to become a "primary" master, which is what the A2000's Coprocessor interface provides. Essentially you have two kinds of bus masters. A secondary master, like a DMA driven hard disk controller, requests the bus, gets a grant, runs as many bus cycles as it needs, and then gets off. It gets to keep the bus as long as it likes, but as long as it's on the bus, no other bus master gets to use the bus. A primary master, like the 68000 or an A2000 coprocessor device, receives all requests from secondary masters. When the primary master receives a request, it grants the bus and gets off. When no secondary master is requesting the bus, the primary master becomes the "default" bus master, essentially taking all the bus time not used by secondary masters. -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy "That's me in the corner, that's me in the spotlight" -R.E.M.