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From: ssave@ole.UUCP (Shailendra Save)
Newsgroups: sci.electronics
Subject: flip/flops
Keywords: f/f latches and registers.
Message-ID: <1943@ole.UUCP>
Date: 16 May 91 20:56:46 GMT
Organization: Seattle Silicon Corp., Bellevue, WA.
Lines: 20


  I have an interesting problem:

  I want a logic equivalent of a flip/flop which can be configurable
  with a mode switch. The inputs allowed are: D and Dbar, clk and mode.

  When mode = 1; It should act as an edge triggered flip-flop (JK)
		 and write on the rising edge of the clock.
  When mode = 0; It should act as a level sensitive latch, and write
		 on the logic high of the clock.

  Minimum no. of logic gates (area) is critical as is no. of logic levels
  (speed). Another restraint is to use inverters and nor gates only.

  If you have had this problem before, or have a solution to this
  problem, please mail me.

  Thanks,
  Shailendra
  ssave@caen.engin.umich.edu