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From: firth@sei.cmu.edu (Robert Firth)
Newsgroups: comp.arch
Subject: Re: new instructions
Message-ID: <25874@as0c.sei.cmu.edu>
Date: 22 May 91 21:41:07 GMT
References: <9105200213.AA05095@ucbvax.Berkeley.EDU> <1991May21.191034.25980@murdoch.acc.Virginia.EDU>
Reply-To: firth@sei.cmu.edu (Robert Firth)
Organization: Software Engineering Institute, Pittsburgh, PA
Lines: 27

In article <1991May21.191034.25980@murdoch.acc.Virginia.EDU> clc5q@hemlock.cs.Virginia.EDU (Clark L. Coleman) writes:

>Given the C source code statement:

>	z = x % y;   /* z gets the remainder of x divided by y */

>... we generate
>the 3-instruction sequence:
>
>	movl	r6,r1		/* Transfer quotient to r1 */
>	clrl	r0		/* Zero out upper word to form 64-bit r0/r1
>				   register pair quotient */
>	ediv	r7,r0,r2,r11	/* Divide r0-r1 pair by r7; throw away quotient
>				   into r2 and keep remainder in r11 */

I hope not.  From the previous code fragment, it is clear you are
expecting the remainder from SIGNED division.  If you want the same
answer as before, the code must be

	MOVL R6,R1		; construct the sign-extended 64-bit ...
	ASHQ #-32,R0,R0		; dividend in the register pair <R0,R1>
	EDIV ... as before

You might like to time THAT sequence, and rethink your post.  Or you
could take my word for it, that when you include the cost of having
to reserve and target into an even-odd register pair, the EDIV is
almost always slower.