Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!think.com!zaphod.mps.ohio-state.edu!cis.ohio-state.edu!tut.cis.ohio-state.edu!ucbvax!pasteur!dog.ee.lbl.gov!nosc!crash!ncr-sd!sagpd1!monty From: monty@sagpd1 Newsgroups: comp.sys.amiga.hardware Subject: Re: HARDWARE HACK: 2630 accellerator card in a Zorro II slot Message-ID: <1991May21.161508.7078@sagpd1> Date: 21 May 91 16:15:08 GMT References: <72302@microsoft.UUCP> <21607@cbmvax.commodore.com> <1991May16.063945.7032@Informatik.TU-Muenchen.DE> <21643@cbmvax.commodore.com> Reply-To: monty@sagpd1.UUCP (Monty Saine) Organization: Scientific Atlanta, Government Products Div, San Diego, CA Lines: 20 In article <21643@cbmvax.commodore.com> daveh@cbmvax.commodore.com (Dave Haynie) writes: >A1000 or A500. While these machines don't have the coprocessor interface, that >isn't an issue unless there's other DMA around. So the CBR/CBG lines can go >directly to the BR/BG lines of the 86 pin edge (they naturally correspond, >anyway). There is no /BOSS line on the 86 pin edge, but there is /BGACK, which >again, in the absense of any other 68000 style DMA, can be used. This requires Dave, Does this mean a DMA device not on the accelertor, or no DMA at all? I guess what I am asking is how the new GVP all in one '030/SCSI/RAM board would adapt to this scheme. Is it possible with out major hacking? So far all I've seen in this hack is some connectors and a minor bit of wiring. This type of board would eliminate needing the expansion chassis in most cases. It might be an interesting exercise to hack the GVP board to an A500/A1000. I understand that the official C= policy may forbid any further comment on this type of hack but I hope they haven't tied your hands that much. Thanks for any additional comments, Monty Saine