Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!think.com!spool.mu.edu!rex!samsung!usc!snorkelwacker.mit.edu!bu.edu!polygen!jerry From: jerry@polygen.uucp (Jerry Shekhel) Newsgroups: comp.sys.ibm.pc.misc Subject: HELP! RAM CAS Wait State? Keywords: RAM CAS waitstate Message-ID: <1095@stewart.UUCP> Date: 17 May 91 19:36:29 GMT Article-I.D.: stewart.1095 Reply-To: jerry@stewart.UUCP (Jerry Shekhel) Distribution: comp Organization: Polygen Corporation, Waltham, MA Lines: 17 Hello. I have a 386/33MHz system with the AMI BIOS. One of the XCMOS settings is the RAM CAS Wait State, whose value (for 33MHz) can be 2 or 3. Originally, the system contained the value 3. I changed it to 2 and observed a slight improvement in benchmark performance. My question is, am I doing something unsafe here? My RAM consists of 70-ns SIMMs. My guess is that this is just the RAM access wait state value. With 2 wait states, there are 3 cycles per memory access, which equals 90.9 ns, so I should be safe. Am I wrong? -- +-------------------+----------------------+---------------------------------+ | JERRY J. SHEKHEL | POLYGEN CORPORATION | When I was young, I had to walk | | Drummers do it... | Waltham, MA USA | to school and back every day -- | | ... In rhythm! | (617) 890-2175 | 20 miles, uphill both ways. | +-------------------+----------------------+---------------------------------+ | ...! [ princeton mit-eddie bu sunne ] !polygen!jerry | | jerry@polygen.com | +----------------------------------------------------------------------------+