Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!nstn.ns.ca!news.cs.indiana.edu!samsung!sol.ctr.columbia.edu!zaphod.mps.ohio-state.edu!rpi!uupsi!cmcl2!lanl!cochiti.lanl.gov!jlg From: jlg@cochiti.lanl.gov (Jim Giles) Newsgroups: comp.arch Subject: Re: new instructions Message-ID: <24327@lanl.gov> Date: 23 May 91 13:05:26 GMT References: <24216@lanl.gov> <1991May23.192557.7558@kithrup.COM> <24263@lanl.gov> <1991May23.220143.8515@kithrup.COM> Sender: news@lanl.gov Organization: Los Alamos National Laboratory Lines: 17 In article <1991May23.220143.8515@kithrup.COM>, sef@kithrup.COM (Sean Eric Fagan) writes: |> [...] |> It would? John, would you care to comment on that? It seems that MIPS |> engineers were derelict in their job, and didn't realize that adding |> hardware pop-count would speed up everything else the chip does. As they would have said on the old Perry Mason show: incompetent, irrelevant, and immaterial. I never said that pop count would speed the rest of the chip's functions - so your comment has _absolutely_ _no_relevance_ to the discussion at all. Pop count _would_ speed the machine by allowing the operation to be done in hardware instead of your slow table lookup. This would speed the very benchmarks you were bragging about in your previous post (the R6000 is faster than Cray on scalar - sometimes this is even true). J. Giles