Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!dali.cs.montana.edu!uakari.primate.wisc.edu!zaphod.mps.ohio-state.edu!think.com!cass.ma02.bull.com!mips2!bull.bull.fr!corton!mcsun!sunic!cs.umu.se!dvljrt From: dvljrt@cs.umu.se (Joakim Rosqvist) Newsgroups: comp.sys.amiga.advocacy Subject: Re: Blitter vs. 040 (was: Computer Architecture question Message-ID: <1991May23.075950.4177@cs.umu.se> Date: 23 May 91 07:59:50 GMT References: <4954@orbit.cts.com> Sender: news@cs.umu.se (News Administrator) Organization: Dep. of Info.Proc, Umea Univ., Sweden Lines: 22 > >let me say this loudly! > >THERE IS LITTLE REASON FOR THE CPU TO ACCESS THE SAME BUS AS THE BLITTER! > >there, most everything the cpu does (executing programs) is done in fast >memory. fast memory is on a seperate bus than chip memory. therefore having 2 >busses with 2 seperate processors on them means there should be little bus >contention. the only time the cpu NEEDS to access chip memory is to program >the blitter, and that's only for a few cycles. > It doesn't need to access chip ram even then. The blitter-control registers are in the $dff area, not in chip ram. /$DR.HEX$ -------------------------------------------- Email to: dvljrt@cs.umu.se 2 Windows on the screen? Oh no, not me. I just Logout & Go.