Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!sdd.hp.com!spool.mu.edu!cs.umn.edu!sialis!orbit!pnet51!chucks From: chucks@pnet51.orb.mn.org (Erik Funkenbusch) Newsgroups: comp.sys.amiga.advocacy Subject: Re: Blitter vs. 040 (was: Computer Architecture question Message-ID: <4987@orbit.cts.com> Date: 24 May 91 06:25:01 GMT Sender: news@orbit.cts.com Organization: People-Net [pnet51], Minneapolis, MN. Lines: 36 dvljrt@cs.umu.se (Joakim Rosqvist) writes: >> >>let me say this loudly! >> >>THERE IS LITTLE REASON FOR THE CPU TO ACCESS THE SAME BUS AS THE BLITTER! >> >>there, most everything the cpu does (executing programs) is done in fast >>memory. fast memory is on a seperate bus than chip memory. therefore having 2 >>busses with 2 seperate processors on them means there should be little bus >>contention. the only time the cpu NEEDS to access chip memory is to program >>the blitter, and that's only for a few cycles. >> > >It doesn't need to access chip ram even then. The blitter-control registers >are in the $dff area, not in chip ram. yes it is, the $dff area is in "psuedo" fast ram area, this area is on the chip bus. > > > >/$DR.HEX$ > >-------------------------------------------- >Email to: dvljrt@cs.umu.se >2 Windows on the screen? Oh no, not me. I just Logout & Go. .--------------------------------------------------------------------------. | UUCP: {amdahl!tcnet, crash}!orbit!pnet51!chucks | "I know he's come back | | ARPA: crash!orbit!pnet51!chucks@nosc.mil | from the dead, but do | | INET: chucks@pnet51.orb.mn.org | you really think he's | |-------------------------------------------------| moved back in?" | | Amiga programmer at large, employment options | Lou Diamond Philips in | | welcome, inquire within. | "The First Power". | `--------------------------------------------------------------------------'