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From: henry@zoo.toronto.edu (Henry Spencer)
Subject: Re: parity is for farmers?
Message-ID: <1991May23.203950.20953@zoo.toronto.edu>
Date: Thu, 23 May 1991 20:39:50 GMT
References: <1991May21.232331.24888@cs.umn.edu> <1991May22.234515.24685@milton.u.washington.edu>
Organization: U of Toronto Zoology

In article <1991May22.234515.24685@milton.u.washington.edu> mrc@milton.u.washington.edu (Mark Crispin) writes:
>With core memory, a single magnetic core failing would cause a single
>bit error at a specific location.  Parity is great for detecting that
>kind of error.  Chances are, it didn't happen at a critical location...

This is exactly the dominant error mode for DRAMs:  one bit going bad
either once (alpha particle or cosmic ray) or permanently.  The same
comments apply:  odds are, given intelligent management, you can either
recover transparently (if it hits a page that exists on disk) or just
blow away one process.

>Another possibility with core memory is the failure of a single line
>(row or column) that causes the loss of bit n in locations in a
>particular memory range...

Again, this is exactly analogous to a DRAM failure mode:  one chip dying.
Almost all current DRAM configurations put one bit of each word in each
chip.  That's starting to change as DRAMs get huge and x4 and x8 versions
start to appear, but most systems still do one bit per chip.

>Put another way, if any of the SIMMs in a NeXT were to fail while the
>system was running...

A whole SIMM failing is indeed pretty disastrous.  It should also be
pretty uncommon, unless you've got marginal parts or marginal installers.
-- 
And the bean-counter replied,           | Henry Spencer @ U of Toronto Zoology
"beans are more important".             |  henry@zoo.toronto.edu  utzoo!henry