Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!rutgers!cbmvax!cbmehq!cbmger!peterk
From: peterk@cbmger.UUCP (Peter Kittel GERMANY)
Newsgroups: comp.sys.amiga.advocacy
Subject: Re: Blitter vs. 040 (was: Computer Architecture question
Message-ID: <1248@cbmger.UUCP>
Date: 27 May 91 08:06:51 GMT
References: <4987@orbit.cts.com> <1991May24.174930.20090@convex.com>
Reply-To: peterk@cbmger.UUCP (Peter Kittel GERMANY)
Organization: Commodore Bueromaschinen GmbH, West Germany
Lines: 22

In article <1991May24.174930.20090@convex.com> swarren@convex.com (Steve Warren) writes:
>
>>yes it is, the $dff area is in "psuedo" fast ram area, this area is on the
>>chip bus. 
>                                 [...]
>
>Then this would be a good candidate for improvements in a redesigned chip set,
>yes?  If all coprocessor control registers were implemented in zero-wait-state
>static rams with non-blocking dual ports, that would allow a fast procesor to
>program all the co-processors on the chip bus at full speed without even
>slowing down.

But you forget one *very important* Amiga feature: the Copper. This chip
only can do its work on the chip bus, and it was created to change those
registers on well defined moments via the chip bus. And it does a
tremendous job. Unlike the blitter, no-one until now said that it would
even be possible to emulate the copper through the CPU. So there's no
way, the registers have to remain on the chip bus.

-- 
Best regards, Dr. Peter Kittel  // E-Mail to  \\  Only my personal opinions... 
Commodore Frankfurt, Germany  \X/ {uunet|pyramid|rutgers}!cbmvax!cbmger!peterk