Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!jarthur!uunet!cbmvax!daveh
From: daveh@cbmvax.commodore.com (Dave Haynie)
Newsgroups: comp.sys.amiga.advocacy
Subject: Re: Blitter vs. 040 (was: Computer Architecture question
Message-ID: <22014@cbmvax.commodore.com>
Date: 29 May 91 20:11:48 GMT
References: <4987@orbit.cts.com> <1991May24.174930.20090@convex.com>
Reply-To: daveh@cbmvax.commodore.com (Dave Haynie)
Organization: Commodore, West Chester, PA
Lines: 44

In article <1991May24.174930.20090@convex.com> swarren@convex.com (Steve Warren) writes:
>In article <4987@orbit.cts.com> chucks@pnet51.orb.mn.org (Erik Funkenbusch) writes:
>>dvljrt@cs.umu.se (Joakim Rosqvist) writes:

>>yes it is, the $dff area is in "psuedo" fast ram area, this area is on the
>>chip bus. 

>Then this would be a good candidate for improvements in a redesigned chip set,
>yes?  If all coprocessor control registers were implemented in zero-wait-state
>static rams with non-blocking dual ports, that would allow a fast procesor to
>program all the co-processors on the chip bus at full speed without even
>slowing down.  The only thing the processor would have to slow down for would
>be when it was copying blocks of data from fast ram into chip ram.

Not quite.  Registers aren't the same thing as static RAM at all, though they
may look that way to the programmer.  In most cases, Amiga chip registers are
multiported.  One of these ports is always on the RGA bus.  The reason you get 
register slowdown during heavy bus activity is that, to access any Amiga chip
register, you need to send out it's corresponding RGA code.  Video fetches and
blitter activity also have corresponding RGA codes, and there's only one RGA
bus in the system.  While its theoretically possible to have separate RGA buses
for CPU and Chip operations far as I can tell, it's not a real big win.  You
would do just as well to keep the same single RGA bus architecture and find a
way to keep down the number of video fetches happening at any given time.  Of
course, if I come up with a way to cut the video fetches in half, some joker
will come along and find some neat new things we could do with full bus 
saturation now going twice as fast.  

>If a new chip set were implemented in a more modern process technology then
>these static rams and all the dual-port circuitry could be rolled into the
>ASICs.

The Amiga chip registers are, in fact, all in the full custom chips.  In fact,
it's common to have one register show up in more than one chip, especially for
write registers.  Each chip may have several internal machines that need
various settings from any one of the several hundered Amiga chip registers.




-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: hazy     BIX: hazy
      "That's me in the corner, that's me in the spotlight" -R.E.M.