Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!think.com!spool.mu.edu!uunet!stanford.edu!leland.Stanford.EDU!stidolph From: stidolph@leland.Stanford.EDU (Wayne Stidolph) Newsgroups: comp.sys.ibm.pc.hardware Subject: Re: sharing hardware interrupts Message-ID: <1991May29.193457.7961@leland.Stanford.EDU> Date: 29 May 91 19:34:57 GMT Article-I.D.: leland.1991May29.193457.7961 References: <1991May29.014824.16278@ux1.cso.uiuc.edu> <08VP31w164w@bluemoon.uucp> Organization: AIR, Stanford University Lines: 33 In article <08VP31w164w@bluemoon.uucp> jamaass@bluemoon.uucp (Jeffrey A. Maass) writes: >phil@ux1.cso.uiuc.edu (Phil Howard KA9WGN) writes: > >> I have read that two devices cannot share and concurrent use the same >> interrupt (IRQ). I'd like to know if this is really so true and if it >> is more a case of just dumb software (which abounds in this world). >> >> Given the above software, why could it not be possible to have two or >> more devices share the same interrupt. >> > >Phil: You _CANNOT_ share interrupts on a PC/XT/AT, and the reason >is in hardware, not dumb software. > [deleted] ... (has to do with the leading-edge-triggered" nature of > the interrupt hardware.... Don't have manual with me, but IBM Tech Ref for PC/AT explains interrupt sharing around page 2-13 or so... should work as described by Phil. Interrupts at 8259A can be either level or edge triggered (depends on Initialization Command Word number 1, bit D3 (LTIM). Up to software which way to go. In a level-detect mode, if two devices are holding IRQ and you service one, then when you do the EOI the 8259 will generate another INT to the CPU, so you'll do the second. I don't remember which way the AT sets LTIM by default. Hope there's some good in this. I'll have time to check my notes on how to do this middle of next week. Good luck! -- Wayne stidolph@leland.stanford.edu