Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!stanford.edu!neon.Stanford.EDU!kaufman From: kaufman@neon.Stanford.EDU (Marc T. Kaufman) Newsgroups: comp.sys.mac.programmer Subject: Re: 68000 Assembly question -- overflow Message-ID: <1991May30.021612.11788@neon.Stanford.EDU> Date: 30 May 91 02:16:12 GMT References: <12423.284125F3@stjhmc.fidonet.org> <1991May29.164914.22930@uservx.afwl.af.mil> Organization: Computer Science Department, Stanford University, Ca , USA Lines: 44 In article <1991May29.164914.22930@uservx.afwl.af.mil> galetti@uservx.afwl.af.mil writes: .Yeah, and worse yet, think of the added complexity needed to implement an ALU .that has to deal with one's complement. A simple adder can add two positive .numbers. The beauty of two's complement is that you can use the same adder to .add two negative numbers, or a positive and a negative number, and provided you .don't generate an overflow, you get the right answer! The simplest example: .Add -1 to a number. In 8-bit one's complement you would have: . 10000001 (-1) . + 00000001 (+1) Unfortunately for you, this is Sign/Magnitude notation, NOT 1's complement. The 1's complement representation is: 11111110 (-1) + 00000001 (+1) .You would first have to decide which number is negative, invert the sign bit, .move it to the subtrahend field, and then subtract it from the positive number. .With two's complement: . 11111111 (-1) . + 00000001 (+1) .You simply add these two numbers and get zero! Of course there are a few tests .the ALU must do to generate overflow flags, but they can be done in parallel .with the add, and thus no additional delay is incurred. . ___________________________________________________________________________ . / Ralph Galetti Internet: galetti@uservx.afwl.af.mil \ .| PL/ARCB Interests: computers, music, computers | .| Kirtland AFB, NM 87117-6008 and music, golf, sleep. | . \______________"I hate cliches--I avoid them like the plague"_______________/ Tsk, Tsk, Ralph. I thought Kirtland had a Control Data 6600 (or Cyber 70 as they are called today). Guess what: that is a 1's complement machine. The arithmetic is no more complicated on a 1's complement machine. If you are using adders, just take the carry end-around to the low end. The real way to do 1's complement is to use SUBTRACTERs, as CDC did. That way, the only time you will get -0 as a result is if you add -0 to -0. Negation is MUCH faster in 1's complement (exercise left to the student). Marc Kaufman (kaufman@Neon.stanford.edu)