Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!zaphod.mps.ohio-state.edu!wuarchive!emory!tridom!srh
From: srh%tridom.uucp@mathcs.emory.edu (Steve Harmon)
Newsgroups: comp.sys.tandy
Subject: 16B/6000 MMUs (more info)
Message-ID: <1991May28.141333.16031@tridom.com>
Date: 28 May 91 14:13:33 GMT
Sender: srh@tridom.com (Steve Harmon)
Distribution: na
Organization: AT&T Tridom; Marietta, Georgia
Lines: 48


    Since I've received a great deal of interest in information about
extending the MMU on the 16B/6000 I've decided to post the info.  The
following should provide a little more info than my previous post.

	- the MMU (as I built it) is a 3" x 5" (approx) add on board
	- it is added to the CPU board in place of the CPU
	- it allows up to 7 meg (actually 7.5) of User RAM under Xenix 3.2
	- there are no limitations on the type of RAM boards (although some
	  earlier Tandy RAM boards have some interesting design problems)
	- the add on is passive in a pre Xenix 3.2 system (i.e. the OS doesn't
	  know how to use the extended MMU and therefore is limited to the
	  usual 1 meg of RAM)
	- there are no speed limitations for CPUs that have been modified for
	  greater than 8Mhz operation provided that you use fast parts in 
	  certain critical areas when you build the board (i.e. 74F series
	  logic)

    Via a friend I had sold over 40 of these into systems with various
configurations.  The only significant memory board problem that I can remember
was related to the float (charge) time of the A19 line.  I seem to recall that
this problem was on an older Tandy memory board if you tried to add over 1Meg
to the system.  If there is enough interest I'll look up my notes on memory
boards and post a list of mods that will help reduce their unreliability.

    BTW, if you don't have a reasonable amount of experience working on
micro-processor based equipment then I wouldn't recommend trying to add
an MMU addition to the 68000 CPU board.  The CPU/memory boards designs are
pretty poor (to say the least) and they are fairly easy to break and rather
difficult to fix.

    If you're reasonably handy with electronics you can put the MMU together
on a small piece of perf board (which is how I prototyped it :-) and attach
it via about 10 leads with 2 or 3 track cuts on the CPU board.

    Anyway, I'll post more detailed info soon.  Right now I've sent the info
to several people in order to evaluate the format of the information.  One
problem that I see coming up is the format in which to distribute my schematic.
I was planning on posting it in postscript format (compressed of course), if
anyone has a better suggestion then please let me know.  (Reply by email please
since I don't often read this group)

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