Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!cs.utexas.edu!romp!auschs!awdprime!awdprime.austin.ibm.com!sdl From: sdl@adagio.austin.ibm.com (sdl) Newsgroups: comp.unix.aix Subject: Re: Help catching floating point exceptions Message-ID: Date: 29 May 91 22:12:49 GMT References: <1991May27.213751.24223@murdoch.acc.Virginia.EDU> <91149.150333AER7101@TECHNION.BITNET> Sender: news@awdprime.UUCP Reply-To: sdl@glasnost.austin.ibm.com Organization: IBM PS Programming Lines: 46 In-reply-to: AER7101@TECHNION.BITNET's message of 29 May 91 19:59:29 GMT In article <91149.150333AER7101@TECHNION.BITNET> AER7101@TECHNION.BITNET (Zvika Bar-Deroma) writes: Zvika> I've been told by my IBM rep. that as IEEE didn't require that division Zvika> by zero be trapped and signalled, then (some/many/most) RISC machines Zvika> don't, and he thinks, that unless there's such a requirement from IEEE, Zvika> they won't also in the forseeable future. Your rep. is correct. From IEEE 854-1987: "There are five types of exceptions that shall be signaled when detected. The signal entails setting a status flag, taking a trap, or possibly doing both". Moreover, IEEE requires that if you implement IEEE trapping, that "A trap handler should have the capabilities of a subroutine that can return a value to be used in lieu of the exceptional operation's results." In the case of invalid operation and divide by zero exceptions, the signal handler must be delivered the operand values of the operation. However, in the RISC System/6000's pipelined mode, the floating point processor will have already destroyed the operands by the time the branch processor can take the branch to the trap handler. Thus, it can only generate IEEE floating point traps in sychronous execution mode. Usual Disclaimer: I write code, not make policy. -- -------------------------------------------------------------------- Stephen Linam PSP Austin T/L: 793-3674 Bell-net: (512) 823-3674 IBM Internet: sdl@adagio.austin.ibm.com VNET: LINAM at AUSTIN From outside IBM: sdl@glasnost.austin.ibm.com