Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!apple!mips!spool.mu.edu!uunet!mcsun!cernvax!chx400!bernina!iis!ruehl From: ruehl@iis.ethz.ch (Roland Ruehl) Newsgroups: comp.arch Subject: Re: iWARP notes... it's pretty neat Keywords: iWARP, parallel processing, vlsi, Message-ID: <1991May31.134645.23455@bernina.ethz.ch> Date: 31 May 91 13:46:45 GMT References: <16136@life.ai.mit.edu> Sender: news@bernina.ethz.ch (USENET News System) Organization: IIS, Swiss Fed. Inst. of Technology Lines: 53 Nntp-Posting-Host: etzj-gw In article uh311ae@sunmanager.lrz-muenchen.de (Henrik Klagges) writes: > : >Basically, 4 bidirectionals isn't bad. I would prefer the 8 ones of the >new transputers, especially given the fact that they support a virtual >channel concept - i.e., giving you as many software channels as you want. >The XX, YY only restriction, however, is severe and sounds like an engi- >neering joke. > : iWARP supports 20 logical communication channels which are implemented in hardware by multiplexing 4 bidirectional hardware busses. With these logical channels it is possible to emulate for instance a 2^6 Hypercube on an 8x8 iWARP system without introducing software overhead. > : >At $9K half-Sparc performance ? I'd rather buy a full Sparc (including >color monitor, 16Megs & HDD). For large parallelism, there is still a >connection machine (SIMD), a BBN Butterfly, a Meiko Computing Surface, > : The CM is an SIMD machine and the BBN a shared memory parallel processor with the associated drawbacks. A competetive Computing Surface either uses the i860 with the compiler problems you mentioned, or an H1 (=T9000) which has not been officially released yet (how about an optimizing H1 C compiler ?) > : >The iWARP was from the very beginning designed to be a building block >for 2D-mesh dataflow computers. > : A dataflow computer (see for instance "Monsoon: ..." by Papadopoulos and Culler in ISCA 90) is designed to execute efficiently dataflow graphs typically expressed in a functional language (for instance ID). iWARP is programmed in C or W2 using low latency communication primitives. Standart numerical applications (SOR, dense linear algebra, signal processing, ...) can be parallelized efficiently provided enough local memory. Although the current C compiler release does not support LIW optimization, iWARP has a good communication speed / local computation performance ratio compared to other distributed memory parallel processors (MIMD) commerically available at the moment. --------- Roland Ruehl uucp: uunet!mcsun!ethz!ruehl Tel: (01) 256 5146 (Switzerland) eunet: ruehl@iis.ethz.ch +411 256 5146 (International) Integrated Systems Laboratory ETH-Zentrum 8092 Zurich