Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!nstn.ns.ca!news.cs.indiana.edu!att!linac!pacific.mps.ohio-state.edu!zaphod.mps.ohio-state.edu!usc!jarthur!ucivax!ucla-cs!oahu!frazier From: frazier@oahu.cs.ucla.edu (Greg Frazier) Newsgroups: comp.arch Subject: Re: iWARP notes... it's pretty neat Keywords: iWARP, parallel processing, vlsi, Message-ID: Date: 31 May 91 17:19:36 GMT References: <16136@life.ai.mit.edu> <1991May31.134645.23455@bernina.ethz.ch> Sender: usenet@cs.ucla.edu (Mr. News Himself) Organization: UCLA, Computer Science Department Lines: 19 Nntp-Posting-Host: oahu.cs.ucla.edu ruehl@iis.ethz.ch (Roland Ruehl) writes: +In article uh311ae@sunmanager.lrz-muenchen.de (Henrik Klagges) writes: +>The iWARP was from the very beginning designed to be a building block +>for 2D-mesh dataflow computers. +A dataflow computer (see for instance "Monsoon: ..." by Papadopoulos +and Culler in ISCA 90) is designed to execute efficiently dataflow +graphs typically expressed in a functional language (for instance ID). +iWARP is programmed in C or W2 using low latency communication +primitives. I think what he meant to say was that the iWARP was designed as a building block for systolic arrays. Which it was/is. -- Greg Frazier frazier@CS.UCLA.EDU !{ucbvax,rutgers}!ucla-cs!frazier