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From: jbs@WATSON.IBM.COM
Newsgroups: comp.arch
Subject: IEEE floating point
Message-ID: <9106050053.AA00244@ucbvax.Berkeley.EDU>
Date: 5 Jun 91 00:57:08 GMT
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         Ping Huang asked:
Reading this thread, I get the impression that several people feel that
IEEE compliance exacts a large toll in speed.  I do not doubt this, but
I was wondering if anyone had comparative statistics on the speed of
floating point operations when performed by an IEEE-compliant package
versus one which was not.  Of course, to be meaningful the data would
have to be for the same piece of hardware.

         The following quote from "Machine Organization of the IBM RISC
System/6000 processor" by G.F. Grohoski, IBM Journal of Research and
Development", vol 34, 1990, p37-58 (p56-57) may give some indication.
         "... the RISC System/6000 uses the IEEE floating-point arith-
metic format, while AMERICA used the IBM System/370 format. ... This
degraded floating point performance substantially in peak floating-
point loops.  For example, using the 2D graphics example above, the
RS/6000 machine takes seven cycles per loop iteration as opposed to four
in AMERICA.  On balance however this degradation is less severe; while
the potential AMERICA LINPACK performance was approximately 15 MFLOPS,
the RISC System/6000 achieves nearly 11 MFLOPS."
         The main reason for the performance degradation appears to be
the need for rounding in IEEE.
                        James B. Shearer