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From: martin@adpplz.UUCP (Martin Golding)
Newsgroups: comp.arch
Subject: Re: new instructions
Message-ID: <785@adpplz.UUCP>
Date: 5 Jun 91 16:43:48 GMT
Article-I.D.: adpplz.785
References: <12947@mentor.cc.purdue.edu> <182@armltd.uucp>
Distribution: comp
Organization: ADP Dealer Services R&D, Portland, OR
Lines: 38

In <182@armltd.uucp> abaum (Allen Baum) writes:

>In article <12947@mentor.cc.purdue.edu> hrubin@pop.stat.purdue.edu (Herman Rubin) writes:

>>There are a rather large number of cases in which unsigned arithmetic
>>is needed.  
>>Now how much additional silicon would it take to provide both signed
>>and unsigned?  

>                                          Do not presume that because
>unsigned & signed multiply are both multiplies, that including both
>is cheap. It may not be the case. Boothe style mults. are implicitly
>signed, for example. To pretend they aren't mean multiplying two
>33 bit numbers.

No, for a 32x32=>32 (or nxn=>n) you need do nothing at all. For
32x32=>64 (nxn=>2n) you need the (logical) extended bits to be
copies of the sign bit (signed) or copies of 0 (unsigned).
Since accomodating the sign is what requires hardware, multiplexing
whatever is done with a force to zero should take only a few gates.
In either case, of course, you need some extra logic for the status
bits (overflow, particularly), if you keep status bits.


>However, you are not a hardware designer. 

Are you a hardware designer, and if so, and if you think I'm an idiot
(which is entirely possible), could you email me a description (brief
if you prefer) of a signed multiply algorithm that can't easily
handle unsigned values? I'm always eager to learn, but the rest of
these people don't need to be annoyed. You can still flame me on the
net, of course.


Martin Golding    | sync, sync, sync, sank ... sunk:
Dod #0236         |  He who steals my code steals trash.
A poor old decrepit Pick programmer. Sympathize at:
{mcspdx,pdxgate}!adpplz!martin or martin@adpplz.uucp