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From: ForthNet@willett.pgh.pa.us (ForthNet articles from GEnie)
Newsgroups: comp.lang.forth
Subject: Memory Management/PIC
Message-ID: <2842.UUL1.3#5129@willett.pgh.pa.us>
Date: 2 Jun 91 14:09:37 GMT
Organization: (n.) to be organized.  But that's not important right now.
Lines: 28

Category 10,  Topic 36
Message 24        Sat Jun 01, 1991
B.RODRIGUEZ2 [Brad]          at 18:02 EDT
 
Well, as long as I'm being mentioned, I suppose I can respond...

I _do_ have a problem with implementing slower @ and ! operators on 68000s,
LSI-11s, and such.  The problem with these CPUs is not just the 4-cycle
performance hit experienced by the 8086.  On the 68000 and LSI-11, word
accesses to odd addresses are flat-out _illegal_. This means a 16-bit @ would
have to be synthesized from two 8-bit fetch instructions.  Gag.

Also, judging by what I've learned recently in my architecture courses, this
problem is not going to go away.  Word access at odd addresses is a
significant hardware investment and has an unavoidable timing impact.  The
trend these days, what with RISCs and all, is to simplify the processor and
make the compilers smarter.

- Brad
 Brad Rodriguez        | brad%candice@maccs.uucp      (God willing)
 B.RODRIGUEZ2 on GEnie | brad%candice@maccs.dcss.mcmaster.ca
 "Shoes for industry!" | bradford@maccs.dcss.mcmaster.ca  (archaic)

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