Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!samsung!crackers!m2c!risky.ecs.umass.edu!medr3.ecs.umass.edu!giovin From: giovin@medr3.ecs.umass.edu (Rocky J Giovinazzo) Newsgroups: comp.sys.apple2 Subject: Re: Which is better AE or ZIP Chip? Message-ID: <1991Jun4.153414.17050@risky.ecs.umass.edu> Date: 4 Jun 91 15:34:14 GMT References: <1DDD4EB00000DD40@MSUS1.MSUS.EDU> Sender: usenet@risky.ecs.umass.edu (USENET News System) Organization: University of Massachusetts, Amherst Lines: 15 Nntp-Posting-Host: medr3.ecs.umass.edu In article <1DDD4EB00000DD40@MSUS1.MSUS.EDU> PKBRANDON@MSUS1.MSUS.EDU writes: >In addition, I was told over >the phone by a customer service technician that the cache chips could be >added by a user (they're standard static RAMs). To increase the cache on >the TWGS you have to buy a "piggyback" board for $85-90; I haven't seen >anything about a CPU upgrade. At any rate, the memory cache seems to be >the most cost-effective way of upgrading an accelerator. I think I have a bunch of these chips sitting in my closet (and I plan to soon purchase a zip gs). How many do I need to fill up the board? I assume that they have to be added in groups of something (like groups of 4 or something). Thanks, Rocky Giovinazzo