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From: kiki@uhunix1.uhcc.Hawaii.Edu (Jack W. Wine)
Newsgroups: comp.sys.atari.st
Subject: Re: More than 4 Meg ??
Summary: maybe, but not duck soup
Message-ID: <13310@uhccux.uhcc.Hawaii.Edu>
Date: 4 Jun 91 10:16:44 GMT
References: <91154.141443SYSPMZT@GECRDVM1.BITNET>
Sender: news@uhccux.uhcc.Hawaii.Edu
Organization: University of Hawaii
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In article <91154.141443SYSPMZT@GECRDVM1.BITNET> SYSPMZT@gecrdvm1.crd.ge.com writes:
>The implication I've heard is that I can only address 4 Meg with my 1040 STe.
>I've already upgraded to that point with 4 1-Meg SIMMS, and am wondering if,
>should memory prices drop in the future, I'll be able to expand with
>4 2-Meg or 4 4-Meg SIMMS.
>
>Is there an architectural restriction limiting a 1040 STe to addressing
>4 Meg, and if so, what is that restriction?  Also, can anyone explain if and
>why I must add symetric amounts of memory in the SIMM slots? (eg 4 1-Meg, not
>1 1-Meg and 3 256K, etc.)

From the looks of my STe, the extra multiplexed address line from the MMU-GLUE
(MLUE) to the SIMMs doesn't exist.  However, the MLUE is a 144 pin chip and a
logic probe showed that most of the unconnected pins are definitely alive!  It
was mentioned earlier that Fast Technology supposedly had a 14MB DRAM upgrade
for the 1040 STe, but I'm not sure how it obtains signals from the MLUE which
has extremely thin surface-mounted pins.

Another puzzle is the shifter, which was enlarged to 84 pins from a 40 pin
chip.  Besides the increased palette, what are all those extra pins used for???
Also someone posted some info about the SCSI-like Microwire serial bus that
the STe has and I hope someone has more docs regarding it.

Jack