Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!mips!apple!fernwood!uupsi!rodan.acs.syr.edu!amichiel From: amichiel@rodan.acs.syr.edu (Allen J Michielsen) Newsgroups: comp.sys.ibm.pc.hardware Subject: Re: Where's the i860? (was Re: 486SX - Intel now telling lies) Message-ID: <1991Jun2.235352.22873@rodan.acs.syr.edu> Date: 2 Jun 91 23:53:52 GMT References: <1991Jun2.030215.11584@unixland.natick.ma.us> <1991Jun2.041512.29546@leland.Stanford.EDU> <30379@hydra.gatech.EDU> Organization: Syracuse University, Syracuse, NY Lines: 43 In article <30379@hydra.gatech.EDU> hh2@prism.gatech.EDU (HAAS) writes: ...a whole bunch of people said stuff.... >>|> How does the i486 compare with the 20 - 30 MIPS of the SUN Sparc chips? >>Assuming that everything runs in memory, then i486 33 Mhz offers you about 21 >>MIPS and less then 2 MegaFLOPS. Now IBM RISC POWERstation 320 20Mhz offers >>you 29.5 MIPS and 8.5 MFLOPS. So given enough memory to both, i486 33Mhz >( body of nicely written survey deleted ) >>Remember even Intel had to venture into RISC and made this i860? ... >80 MFLOPS (FP multiply/accumulate in one clock cycle) SO . . . . . >Where are the i860 based machines ?!? ... >The only i860 base machine I've heard of is a retro-fit for the SPARC >machines. My guess is that the people that CAN make an i860 based machine >simply don't want to. Actually, a whole slew of products are starting to hit the market using the i860 in PostScript aplications. PS accelerators for laserprinters, PS engines for new laserprinters, PS interpreters for output or display applications. While this is a far cry from what you intended, it better than.... My reading of the trade press indicates that intel really pissed a lot of people off. In regards to the i860, they tried to strong arm potential customers into signing contracts in order to support financing for the program, using threats of potential 'chip' shortages, contract supporters get first crack... (While even a no power contract supports intel because they use these contracts to demonstrate the low financial risk, pushing down the bond or financing rate....). On the other side, they told potential developers that they would have no hand or input into the product design. "You will get a little bitty black box that does what we tell you" Nothing that could be potentially used by compteitors was published as part of the specs. these 2 things alone made intel the odd man out in the risc race. Other vendors (such as mips) were very open to design (high level) and responsive to the needs of the customers. Actually, they didn't even have to be responsive, just forth coming with enough info to convince 'the other' engineers that they don't need or want whatever it is they think they want. al -- Al. Michielsen, Mechanical & Aerospace Engineering, Syracuse University InterNet: amichiel@rodan.acs.syr.edu amichiel@sunrise.acs.syr.edu Bitnet: AMICHIEL@SUNRISE