Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!jarthur!nntp-server.caltech.edu!gwoho
From: gwoho@nntp-server.caltech.edu (g liu)
Newsgroups: comp.sys.ibm.pc.hardware
Subject: Re: Where's the i860? (was Re: 486SX - Intel now telling lies)
Message-ID: <1991Jun3.065417.23682@nntp-server.caltech.edu>
Date: 3 Jun 91 06:54:17 GMT
References: <1991May29.230433.10095@maverick.ksu.ksu.edu> <1991May30.164751.16585@thyme.jpl.nasa.gov> <1991May31.183111.16505@ux1.cso.uiuc.edu> <1991Jun2.030215.11584@unixland.natick.ma.us> <1991Jun2.041512.29546@leland.Stanford.EDU> <30379@hydra.gatech.EDU> <1991Jun
Organization: California Institute of Technology, Pasadena
Lines: 34

>|> 
>|> ( body of nicely written survey deleted )

>Thank you.  

>|> 
>|> >Remember even Intel had to venture into RISC and made this i860?  And lot's
>|> >people use it as graphic coprocessor or numerical coprocessor, why? RISC,
>|> >=> superior floating point performance (> 30 MegaFLOPS), that is.
>|> 

aclually only 80 mflops when the using pipeline multiply+add instructions
out of the registers.
often the pipeline cant be used, and only ordinary multiply or add instructions
can be used, and not all the data is in the registers, in which case
it is about 10 times slower. 
in real applications, i would imagine that a 40 mhz 860 is about
10 mflops.  only hand coded stuff will work at 80mflops. 
multiplying small matrixes that fit in registers might be 80mflops,
but not much else.
>|> 80 MFLOPS (FP multiply/accumulate in one clock cycle) SO . . . . .

>Yours uses high end i860 chip.  Man!  My face is green with envy now :-(
>I certainly know how to put 80 MFLOPS into good use :-)

>|> Where are the i860 based machines ?!? YEARS ago (it seems) when IBM

>[some stuff deleted] 


>Chin Fang
>Mechanical Engineering Department
>Stanford University
>fangchin@leland.stanford.edu