Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!wuarchive!psuvax1!rutgers!mcdhup!inferno!shane From: shane@inferno.peri.com (Shane Bouslough) Newsgroups: comp.sys.ibm.pc.hardware Subject: Re: 486SX - Intel now telling lies Message-ID: <1991Jun4.174624.8972@inferno.peri.com> Date: 4 Jun 91 17:46:24 GMT References: <1991May31.210116.16012@odin.diku.dk> Organization: Periphonics Corp. Lines: 26 From article <1991May31.210116.16012@odin.diku.dk>, by basker@diku.dk (Tom Thuneby) speculates: > > Several people have pointed the following things out (I don't know > if they're all facts; but it sounds OK to me): > > 1) The yield of a batch of 25 MHz 486's is around 14% ??? > 2) More than half of the silicon is used by the coprocessor Not from the photos I've seen. The cache alone takes up a pretty big chunk. > 3) The coprocessor has a relatively high probability of errors Vs. what? > Tom Thuneby (basker@diku.dk) -- Periphonics Corp. | Shane Bouslough is: shane@inferno.peri.com Ride Bike! 4000 Veterans Hwy. | Bohemia, NY 11716 | "Too slow, Chicken Marango! Too slow for *this* cat!" 516-467-0500 | -Cat, Red Dwarf