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From: stevem@specialix.co.uk (Steven Murray)
Newsgroups: sci.electronics
Subject: Re: Distinguishing between logic state and tri state
Message-ID: <1991Jun4.094429.20916@specialix.co.uk>
Date: 4 Jun 91 09:44:29 GMT
References: <1991Jun3.193519.19595@uokmax.ecn.uoknor.edu>
Organization: Specialix International, London
Lines: 34

sashahi@uokmax.ecn.uoknor.edu (Sandeep Shahi) writes:


>   Can anybody suggest a circuit which can separate a logic(0 or 1)
>   from a tri state.
>   The output of such a circuit is to be read by the host
>   for further action

My suggestion is pull the signal to an 'indeterminate' state with
a resistor to ground and a resistor to +5v, then put a 'window comparator'
on the signal to see when it has reached this voltage.
Precise values will depend on the circuit, but for a typical TTL application,
you could use perhaps a 2.2k to gnd and 3.3k to +5v to establish an
'indeterminate state' of 2v, then two voltage comparators on this signal
to check the voltage.  To make a window comparator, take two open-collector
comparator devices (such as LM396/LM339), connect minus-in on one comparator
to a voltage set to your lower threshold (e.g. 1.5v), plus-in on the other
comparator to your upper threshold (e.g. 2.25v), the two remaining inputs
together to the signal to be monitored, the two outputs together to a pullup
resistor, and off to your host.  The output goes high when the signal is
'in the window' (in your case 'tri-state').  Pullup again depends on your
application - perhaps 4.7k.   You set the voltage for the comparator 
thresholds using another resistor divider - perhaps +5v-18k-4.7k-10k-gnd.
Good Luck.

Regards
Steven Murray


-- 
Steven Murray
uunet!slxsys!stevem  stevem@specialix.co.uk
I must write out one thousand times "I will not leave myself logged in"
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