Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!dali.cs.montana.edu!milton!whit
From: whit@milton.u.washington.edu (John Whitmore)
Newsgroups: sci.electronics
Subject: Re: Distinguishing between logic state and tri state
Message-ID: <1991Jun4.222654.11849@milton.u.washington.edu>
Date: 4 Jun 91 22:26:54 GMT
References: <1991Jun3.193519.19595@uokmax.ecn.uoknor.edu>
Organization: University of Washington, Seattle
Lines: 33

In article <1991Jun3.193519.19595@uokmax.ecn.uoknor.edu> sashahi@uokmax.ecn.uoknor.edu (Sandeep Shahi) writes:

>   Can anybody suggest a circuit which can separate a logic(0 or 1)
>from a tri state.
>		The output of such a circuit is to be read by the host
>for further action

	The obvious answer is to test the impedance of the pin; a 
220 pF capacitor and 2.2K ohm resistor in series from a square wave
generator can put a trickle of current into the pin (at some suitable
frequency), whereupon one can test with an XOR gate whether the
pin follows the square wave input (in which case it is tristate)
or not.  Remember that the XOR may have some race conditions,
so you must reject very narrow 'glitches' with a filter of some sort,
or by disabling the XOR's output sensor (an R/S flip-flop?) during
a brief period at each of the square wave's transitions.
	This will test the impedance of BOTH the pin and the tester;
you will want to use low-leakage gates to sense the pin (CMOS is
ideal).  Many tri-state circuits have termination resistors attached
so that the output stays HIGH unless more current is allowed (and
that will require a change of the resistor value cited above).

	In the old days, one simply had a termination resistor that
pulled the output into the TTL forbidden region (about 1.5V); no
logic LOW or logic HIGH gate would ever spend long at that voltage,
so a simple gate comparator would detect tri-state.  Alas, the
range of pullup resistor values nowadays is large, and the behavior
of some CMOS circuits with the inputs held in that range is terrible
(it can destroy the chip).  Unless you know the value of pullup
resistors on the tri-state lines, or unless you know there's no
CMOS that could be damaged, that technique is not reliable.

	John Whitmore