Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!wuarchive!udel!brahms.udel.edu!lamb
From: lamb@brahms.udel.edu (Richard E Lamb)
Newsgroups: sci.electronics
Subject: Re: Distinguishing between logic state and tri state
Message-ID: <21913@brahms.udel.edu>
Date: 5 Jun 91 02:51:54 GMT
References: <1991Jun3.193519.19595@uokmax.ecn.uoknor.edu> <1991Jun4.222654.11849@milton.u.washington.edu>
Organization: University of Delaware
Lines: 5

true,
but for TTL tri-state, the terminator network approach works well...
as for determining when the pin is in the High Impedence state requires
use of the infamous MAYBE gate.  Don't know the 74XX number on these,
but you can make on easily from SSI stuff...