Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!rphroy!caen!uwm.edu!psuvax1!rutgers!rochester!pt.cs.cmu.edu!gandalf.cs.cmu.edu!lindsay From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay) Newsgroups: comp.arch Subject: Re: iWarp Architecture Message-ID: <13338@pt.cs.cmu.edu> Date: 9 Jun 91 01:59:17 GMT References: <1991Jun3.172230.6901@iWarp.intel.com> <2622@m1.cs.man.ac.uk> <4077@ssc-bee.ssc-vax.UUCP> Organization: Carnegie Mellon Lines: 24 In article <4077@ssc-bee.ssc-vax.UUCP> carroll@ssc-vax.UUCP (Jeff Carroll) writes: >Professor Kung has been pushing the Warp project at CMU for >a decade or so now, and Intel has been at work on iWarp for several years >funded in part by the Department of Defense. About right. The first Warp was wire wrapped: the second was PCB: and now, by collaboration with Intel, Kung has got a node down to one chip + RAM chips. The design has evolved somewhat in that time, with the compiler people having a large say. The communications issues have received a lot of study, and there is (gasp!) an actual user community for the pre-intel Warp, albeit a very small one. [Just last week, my smiling face was image-processed through a Warp: this in aid of a local enhancement to the idea of "finger"ing people. Kung has in fact taken the I/O issue quite seriously, and is a major force behind our efforts in high speed networking.] This isn't Intel's only collaboration. They are building chips for Dally's J-machine, for example. This strikes me as quite intelligent: costly, but it brings new experiences into the company, and any one project just might wind up paying for all of them. -- Don D.C.Lindsay Carnegie Mellon Robotics Institute