Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!rpi!uupsi!rodan.acs.syr.edu!sganguly
From: sganguly@rodan.acs.syr.edu (Dr. Shantanu Ganguly)
Newsgroups: comp.lang.vhdl
Subject: VHDL benchmark cases needed
Keywords: VHDL, benchmark
Message-ID: <1991Jun6.211406.10848@rodan.acs.syr.edu>
Date: 6 Jun 91 21:14:06 GMT
Sender: sganguly@rodan.acs.syr.edu (Shantanu Ganguly)
Organization: Syracuse University, Syracuse, NY
Lines: 12


Do any VHDL benchmark circuits exist that one could use to
test the performance of a VHDL simulator ?
(something on the lines of Deutsch's Difficult Example for Channels
 or the ISCAS examples)

Please send mail to sganguly@cat.syr.edu, I will summarize.

Thanks, 

Shantanu Ganguly
Syracuse University