Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!wuarchive!udel!haven.umd.edu!mimsy!mojo!SYSMGR@KING.ENG.UMD.EDU
From: sysmgr@KING.ENG.UMD.EDU (Doug Mohney)
Newsgroups: comp.arch
Subject: Moto 88110 ?
Message-ID: <0094A113.42199340@KING.ENG.UMD.EDU>
Date: 13 Jun 91 18:27:43 GMT
Sender: news@eng.umd.edu (C-News)
Reply-To: sysmgr@KING.ENG.UMD.EDU (Doug Mohney)
Organization: The U. of MD, CP, CAD lab
Lines: 15

I came across an InfoWorld blurb about a NeXT(tm) box based around the Motorola
88110. It would (allegedly) pull 50-60 MIPS (ie: 3 times faster than the
68040 currently used) and has enough stuff thrown in on the chip which would
allow them to bundle in functions like image compression on-the-fly, rather
than using Yet More chips and an Intel i860 for image processing. 

I wonder what this is going to do to the Moto CISC line if one of their
major customers (NeXT) goes Moto RISC plus another (Apple) is thinking about
it. It also makes for interesting speculation if you take the current UN*X
boxes (well, Data General & Motos boxes) and slap the New Improved 88110 chips
in...


     Signature envy: quality of some people to put 24+ lines in their .sigs
  -- >                  SYSMGR@CADLAB.ENG.UMD.EDU                        < --