Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!elroy.jpl.nasa.gov!swrinde!mips!pacbell.com!decwrl!pa.dec.com!agni.pa.dec.com!mehra From: mehra@agni.pa.dec.com (Vivek Mehra) Newsgroups: comp.lsi Subject: capacitive/inductive coupling between routing traces? Message-ID: <1991Jun12.135839@agni.pa.dec.com> Date: 12 Jun 91 20:58:39 GMT Sender: news@pa.dec.com (News) Reply-To: mehra@agni.pa.dec.com (Vivek Mehra) Organization: DEC Palo Alto Lines: 9 I'm looking for information/references for computing capacitive and inductive coupling between adjacent i) routing traces on chips and ii) etch on printed circuit boards. I'd like to use these to compute the amount of crosstalk. Thanks -vivek