Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!elroy.jpl.nasa.gov!ncar!noao!arizona!dkoski
From: dkoski@cs.arizona.edu (David A. Koski)
Newsgroups: comp.sys.amiga.advocacy
Subject: Re: A NeXT Article(beware)
Message-ID: <1566@caslon.cs.arizona.edu>
Date: 12 Jun 91 19:45:39 GMT
References: <16647@darkstar.ucsc.edu> <1991Jun12.152204.23497@usenet.ins.cwru.edu> <mx5H+2&t@cs.psu.edu> <1991Jun12.190315.18622@mintaka.lcs.mit.edu>
Organization: U of Arizona CS Dept, Tucson
Lines: 22

From article <1991Jun12.190315.18622@mintaka.lcs.mit.edu>, by rjc@geech.gnu.ai.mit.edu (Ray Cromwell):
>   Mike, don't compare CISC MIPS to RISC MIPS. Let's say RISC processor
> X is rated at 10x the MIPS of CISC processor Y, but a divide instruction 
> takes 20 instructions on X and one instruction on Y. It seems to me
> that division is twice as slow on X. Show me the SpecMarks.

Dumm dumm dumm.  There are no such things as CISC MIPS and RISC MIPS.
Although the definition of MIPS is millions of instructions per second,
no one (except maybe those IBM dorks) uses them that way.  For any
decent comparison you have to compare the work done, not the instructions
executed.  Many times dhrystone will be used to get mips ratings by
comparing times to the vax 11/780 (a 'one mips machine').  

I have seen specmarks for the 88000 and it was faster than the 040, but I
don't think anyone has a 88110 yet.  Sorry.

> BTW, isn't Motorola already wrking on the next generation 88k's ?

Yes, that is what Next is 'planning to use' (the plans to use
the 88k chip are just rumors)

David Koski