Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!usc!wuarchive!sdd.hp.com!mips!dimacs.rutgers.edu!aramis.rutgers.edu!paul.rutgers.edu!njin!princeton!stokes!ssr From: ssr@stokes.Princeton.EDU (Steve S. Roy) Newsgroups: comp.sys.next Subject: Re: NeXT prototype with Motorola 40mhz 88110 RISC CPU! Message-ID: <10705@idunno.Princeton.EDU> Date: 13 Jun 91 05:45:19 GMT References: <676698423wkn3369@edmund.cs.andrews.edu> <2856A9FB.41AD@deneva.sdd.trw.com> Sender: news@idunno.Princeton.EDU Organization: Princeton University Lines: 24 Nntp-Posting-Host: stokes.princeton.edu In article <2856A9FB.41AD@deneva.sdd.trw.com> thomsen@spf.trw.com (Mark R. Thomsen) writes: >Andrew Gillham writes > >The InfoWorld speculation on the NeXTdimension makes no sense - the >i860 is not just a data processor but a data mover ... it's bandwidth >is a major reason to use it in a graphics board. The data bandwidth of >the i860 peaks at 16 bytes x clock rate. The data bandwidth of the 88K >peaks at 4 bytes x clock rate. > > >Mark R. Thomsen This is not really true of the i860. It can talk to it's tiny little 8kb on-chip cache at 16 bytes per clock, but the current i860's can talk to the outside world at only 4bytes per. Supposedly the next generation of them will double that rate, but it still isn't great. More generally, current high density ram chips will have difficulty keeping up with anything that tries to run at the sorts of speeds tossed around by the new RISC speed demons. Anything that claims better than 20MIP performance or so is going to be heavily cache dependant. Steve Roy