Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!wuarchive!udel!nigel.ee.udel.edu!mccalpin From: mccalpin@perelandra.cms.udel.edu (John D. McCalpin) Newsgroups: comp.arch Subject: Re: IEEE arithmetic Message-ID: Date: 16 Jun 91 13:58:40 GMT References: <9106150258.AA16308@ucbvax.Berkeley.EDU> <3707@charon.cwi.nl> Sender: usenet@ee.udel.edu Organization: College of Marine Studies, U. Del. Lines: 30 Nntp-Posting-Host: perelandra.cms.udel.edu In-reply-to: dik@cwi.nl's message of 15 Jun 91 22:23:08 GMT >>>>> On 15 Jun 91 22:23:08 GMT, dik@cwi.nl (Dik T. Winter) said: Dik> In article <9106150258.AA16308@ucbvax.Berkeley.EDU> Dik> jbs@WATSON.IBM.COM writes: JBS> [....] 3. Do you know of any machine where the above code will JBS> average 3x (or less) the time of a single multiply? Dik> So this is irrelevant. Winter is claiming that Shearer is trying to obfuscate the issues about the performance of interval arithmetic (in terms of timing, not the usefulness of the results. I see Shearer asking a very simple question: Please provide *specific* information on machines where Winter's algorithms for interval add and interval multiply perform less than 3 times slower than the equivalent simple operation with a single rounding mode. Then I suppose that the next step is to compare the performance of interval arithmetic with 128-bit arithmetic on a machine like the RS/6000. To do this, we will first need to find someone who knows how expensive the rounding mode change is in the RS/6000 FPU pipe, and then someone who knows the timings of quad-precision arithmetic on the RS/6000. (I will be able to learn the latter as soon as I get xlf version 2 installed on my machine). -- John D. McCalpin mccalpin@perelandra.cms.udel.edu Assistant Professor mccalpin@brahms.udel.edu College of Marine Studies, U. Del. J.MCCALPIN/OMNET