Path: utzoo!utgpu!news-server.csri.toronto.edu!bonnie.concordia.ca!uunet!mcsun!hp4nl!cwi.nl!dik
From: dik@cwi.nl (Dik T. Winter)
Newsgroups: comp.arch
Subject: Re: IEEE arithmetic
Message-ID: <3736@charon.cwi.nl>
Date: 18 Jun 91 08:52:46 GMT
References: <3709@charon.cwi.nl> <3710@charon.cwi.nl> <1991Jun17.231640.3426@dvorak.amd.com>
Sender: news@cwi.nl
Organization: CWI, Amsterdam
Lines: 16

In article <1991Jun17.231640.3426@dvorak.amd.com> tim@amd.com (Tim Olson) writes:
 > One thing to remember, however, is that writes to control registers,
 > such as a floating-point control register, are usually "serializing
 > operations" in pipelined machines.  This means that the FP pipeline will
 > be flushed before the modification of the floating-point control
 > register takes place.
 > 
The keypoint here is that the 88k and 80x87 do have *separate* control and
status registers.  If they are separated there would (if the unit is well
designen) be no need for a write to the control register to be serializing.
And indeed, I do not think it is on those two (at least I have found in
nowhere in the documentation).  I do not know about the 29050; having no
docs for it.
--
dik t. winter, cwi, amsterdam, nederland
dik@cwi.nl