Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!uunet!stanford.edu!cascade.stanford.edu!strat!simoni
From: simoni@strat.Stanford.EDU (Richard Simoni)
Newsgroups: comp.sys.mac.programmer
Subject: Re: Parity (was Re: Mac SIMMs vs. IBM-compatible SIMMs)
Message-ID: <1991Jun24.074743.19030@cascade.Stanford.EDU>
Date: 24 Jun 91 07:47:43 GMT
References: <1991Jun24.175014.4049@waikato.ac.nz> <1991Jun20.191113.8626@gn.ecn.purdue.edu> <25625@well.sf.ca.us>
Sender: news@cascade.Stanford.EDU (USENET News System)
Reply-To: simoni@strat.stanford.edu
Organization: Stanford University
Lines: 24


In article <1991Jun24.175014.4049@waikato.ac.nz>, ldo@waikato.ac.nz
(Lawrence D'Oliveiro, Waikato University) writes:

> Let's see, typical error rates for computer storage are one incorrect
> bit read out of 10 ** 12.

If this were true I'd probably want parity.  Even if my computer only read a
million bytes per second (not a fast computer), I'd see an error every
1e12/8e6 = 1.25e5 seconds = 34.7 hours.

According to the TI 1989 MOS Memory Data Book, each memory chip (depending
on density) exhibits a typical soft error rate of .001 to .0035 per 1000
hours.  Assuming .003, a system with 64 memory chips (e.g., 8 1MB SIMMs)
will flip a bit somewhere in memory every 7 months, on average.  At this
rate, most people probably don't need parity, but some do.

> Adding a parity bit detects half of these errors, so the number
> of undetected errors drops to one in 2 * 10 ** 12.

Parity detects all single-bit errors, which will obviously make up almost
all of the errors, so far more than half are detected.

Rich Simoni