Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!samsung!uunet!fernwood!portal!cup.portal.com!mslater
From: mslater@cup.portal.com (Michael Z Slater)
Newsgroups: comp.arch
Subject: Re: Information on MC88110 requested
Message-ID: <43704@cup.portal.com>
Date: 26 Jun 91 17:06:30 GMT
References: <1991Jun25.081724.21339@Daisy.EE.UND.AC.ZA>
Organization: The Portal System (TM)
Lines: 34

>I have been hearing news about the new 88k MPU from moto but, alas, the
>details are skimpy.  In particular I would like to know:
>
The 88110 has not been announced, Moto has only given some sketchy previews,
so some of the info you want isn't yet public.

>1. Code compatibility and changes

80-bit floating-point and graphics unit are added; I expect it will be fully
upward compatible with 88100 code.

>2. Hardware changes.
>3. Cache arrangement ( esp. related to 88200 )

On-chip 8K instruction and data caches, graphics unit, two integer units,
superscalar instruction dispatch.

>4. Timings and benchmarks.

3-5 times 88100.  That's all Moto will say.

>5. Systems using it

None yet - I don't think Moto has silicon.

>6. Future directions of 88k family and Moto's RISC strategy.

If the IBM/Apple deal goes through, which looks likely at this point, the
future of the 88000 is in serious doubt.  Motorola is likely to make RS/6000
processors, and this is likely to divert most of its design efforts.
Stay tuned -- an announcement is expected soon.

Michael Slater, Microprocessor Report   mslater@cup.portal.com
707/823-4004   fax: 707/823-0504