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From: paul@taniwha.UUCP (Paul Campbell)
Newsgroups: comp.arch
Subject: Re: 64 Bit addressing on R4000?
Message-ID: <880@taniwha.UUCP>
Date: 27 Jun 91 16:28:54 GMT
References: <8083@uklirb.informatik.uni-kl.de> <14900025@hpdmd48.boi.hp.com>
Reply-To: paul@taniwha.UUCP (Paul Campbell)
Organization: Taniwha Systems Design, Oakland
Lines: 22

In article <14900025@hpdmd48.boi.hp.com> sritacco@hpdmd48.boi.hp.com (Steve Ritacco) writes:
>From what I know about the R3000, the only integer unit instruction affected
>by 64-bit operation would be the shift instructions which only have a 5 bit
>field for shift amount.  Clearly you would have to use the register varient
>of the shift instructions, but other than that all the instructions would work
>for 32 or 64 bit opperands.  I'm under the impression that the instruction
>set was layed out for minimal affect on word size.

What about add/sub instructions - they trap on overflow, also any compare
instruction that tests the sign bit - one solution for this might be
for the 32-bit instructions to use the high 32-bits of a register
(you would need new load/store instructions), or you could have a 
64-bit/32-bit flag that puts the CPU into a particular mode (hopefully
there would be one each for user/supervisor modes)

	Paul

-- 
Paul Campbell    UUCP: ..!mtxinu!taniwha!paul     AppleLink: CAMPBELL.P

Tom Metzger's White Ayrian Resistance has been enjoined to stop selling Nazi
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