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From: jfc@athena.mit.edu (John F Carr)
Newsgroups: comp.arch
Subject: Re: 64 Bit addressing on R4000?
Message-ID: <1991Jun29.163857.14050@athena.mit.edu>
Date: 29 Jun 91 16:38:57 GMT
References: <14900025@hpdmd48.boi.hp.com> <880@taniwha.UUCP> <MEISSNER.91Jun28105156@tiktok.osf.org>
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In article <MEISSNER.91Jun28105156@tiktok.osf.org>
	meissner@osf.org (Michael Meissner) writes:
>The other thing I've thought about is how do you do generalized
>external references.  On the current R[236]000's a normal (non-GP)
>reference is two instructions:
>
>	lui	$at,addr>>16
>	<lw/sw>	<reg>,addr&0xffff($at)
>
>I wonder whether we will need four instructions in the 64 bit
>universe.

I think a better way to handle 64 bit addressing is to do what IBM does on
its (32 bit) RISC machines.  Each function has a block of data containing
the addresses of all external objects referenced by the function.  The
function caller loads a register with the address of this data area (having
the caller load the register makes shared libraries and dynamic loading
easier to implement).

C code like

	extern int x;
	x = 4;

compiles to (on the RS/6000)

	l	r3,0x4(r2)		# 4(r2) is &x
	lil	r0,0x4
	st	r0,0x0(r3)

This method takes 2 fewer instructions for a 64 bit address but adds a
memory reference.

I don't know how many MIPS opcodes are unused -- is there room to add two
more instructions with format reg,reg,disp16?  If not you'll need more than
4 instructions to load an address using the current method.

--
    John Carr (jfc@athena.mit.edu)