Path: utzoo!utgpu!news-server.csri.toronto.edu!rpi!zaphod.mps.ohio-state.edu!swrinde!cs.utexas.edu!uunet!mcsun!ukc!acorn!john From: john@acorn.co.uk (John Bowler) Newsgroups: comp.sys.acorn Subject: Re: virtual memory Summary: Paging no, swapping yes? Keywords: virtual memory Message-ID: <8048@acorn.co.uk> Date: 26 Jun 91 18:01:26 GMT References: <10396@suns502.crosfield.co.uk> Organization: Acorn Computers Ltd, Cambridge, UK Lines: 99 In article <10396@suns502.crosfield.co.uk> djhr@crosfield.co.uk (dave redman) writes: >About Virtual Memory, > > I actually wrote some code ( C and assembler ) that enables page >swapping to and from memory to harddisc. I wrote to Acorn asking about how >to hook it into riscos and was told in NO uncertain terms that riscos CAN >NOT use virtual memory. > > It appears that this is because any page swap that occurs in supervisor >mode will corrupt the supervisor return link, thus the code cannot re-start >after the page fault. The only cure to this is to save the return link on >entry to every supervisor mode subroutine that MAY get swapped. Yes - this is the primary problem. There is more than one cure; the one used in RISC iX is to ensure that code which executes in supervisor mode (the kernel) never page faults - to do this the SVC mode code accesses addresses passed (via SWIs) from user mode using routines which ensure the virtual address validity before reading or writing. Because RISC OS doesn't do this, and does rely on R14 not being corrupted by LDR or STR, you cannot have a system which may invalidate addresses which *should* be valid (ie set up in memory controller). So there are two effects:- 1) In practice you cannot dynamically page SVC mode code in any operating system. Fixing this requires either at least one extra processor mode for address exceptions which is entered on the appropriate aborts and shadows (at least) R14, or that the SVC mode code not use R14. 2) SVC mode code which accesses (user mode accessible) pages which may be swapped out has to do something special. RISC iX guarantees (2), RISC OS guarantees neither. > I managed to get BASIC to read and write to virtual memory including >swapping, but I effectively reduced the amount of memory available for >swapping by marking VIDEO (obviously), RMA and sub 8000 address space as >NON mobile. Yes, you must do this - it really is a consequence of the hardware design, not the operating system. After all the trap vectors which are used by the CPU to tell it what code to execute on traps such as address exceptions are located in the *VIRTUAL* address space, not the physical address space. If you invalidate page 0 (addresses 0-0x7fff) the CPU can no longer handle address exceptions! > I eventually gave up after getting the DATA-ABORT routine, and half the >PREFETCH-ABORT working because I discovered that page faults that occur on >instruction fetchs at a page boundary do funny things and needs extra code >to fix it. I couldn't be bothered to work it out and after Acorn said they >wouldn't tell me how to hook it into riscos anyway I just gave up. LDM/STM cause obvious problems if they go from a valid page (address) to an invalid one. The PC value relative to the actual address of the faulting instruction is different with prefetch aborts to the relative value with data aborts. The code is tricky but probably no more tricky than it is on most other CPUs - if you want to give yourself nightmares try writing the corresponding code for the i860. Anyway, the point is that you *can't* hook it in without rewriting RISC OS. On the other hand swapping, rather than paging, could be implemented with less work. With swapping whole (RISC OS) tasks would be swapped to and from RAM when the current task changes; the current task is always completely present. Page faults are then only possible if some part of the system knows where a task other than the current task is. In RISC OS the wimp manages (indeed, implements) tasks, and only the wimp knows about tasks other than the current task - to implement swapping all you have to do is rewrite the wimp :-). You might even be able to do it by fooling the wimp into believing that there is more memory available than there really is and by intercepting attempts by the wimp to map that (non-existent) memory into the virtual address space, on balance, though, it is probably easier to change the wimp ;-). Given the limitations RISC OS imposes on the size of a task, the size of the MEMC pages, and the granularity of task swapping in RISC OS, the traditional advantages of paging over swapping are considerably lessened anyway. > Actually, does anyone out there in netland know how I can convince the >harddisc controller that the disc is partitioned ? ( means convincing >riscos too ). I ask because the current version uses direct disc address >writes for speed ( but via adfs ) but if the disc was compacted or the file >( that I use as swap space ) is not contigous then the disc gets trashed !!!! >Having the ability to write to different partitions would solve this.. > > Ideas and sugestions will be gratefully accepted.. and I know it is >possible because riscix MUST use partitions. If you have an Acorn SCSI disc system SCSIDM allows the partition sizes to be set. You have the option of making the disc into a single RISC OS partition or of allocating RISC iX partitions as well - however, once you've done this to access the non-RISC OS partitions from RISC OS you have to go directly to the SCSI driver. If you have an ST506 drive you can convince RISC OS that the drive is smaller by appropriate changes to the formatter; I believe that ADFS retains all the disc sizing information on the disc itself. Again you have to go directly to the device to access the parts ADFS cannot see (I don't know how difficult this is under RISC OS). John Bowler (jbowler@acorn.co.uk)