Path: utzoo!utgpu!news-server.csri.toronto.edu!qucdn!leek Organization: Queen's University at Kingston Date: Friday, 28 Jun 1991 12:20:44 EDT From: Message-ID: <91179.122044LEEK@QUCDN.QueensU.CA> Newsgroups: comp.sys.amiga.advocacy Subject: Re: Amiga bashing References: <1991Jun11.204407.16603@murdoch.acc.Virginia.EDU> <1991Jun20.200326.16487@bmerh409.bnr.ca> <1991Jun21.002542.19989@mintaka.lcs.mit.edu> <1151@stewart.UUCP> <22762@cbmvax.commodore.com> In article <22762@cbmvax.commodore.com>, daveh@cbmvax.commodore.com (Dave Haynie) says: >on the scene, IBM noticed what a bad job the 8088 did at block copies of >memory. So they put in this DMA controller thing, which also does their >DRAM refresh (they got a patent on that part of it). Anyway, you can use this > Yeap. They could have much better DMA transfer rate by spending $10 on a real DRAM controller. Using one of the DMA channels for DRAM refresh means that they have to restrict DMA transfer to either single byte transfer or block transfers of something like 15 microseconds (see below) at a time so that it would not interfere with normal memory refresh. Note: 15 microseconds is what I think I remembered. It is only a rough figure. With better DRAMs these days, one can get away with longer refresh period. The PC chip-set people might have put in a DRAM controller so this problem might not happen on newer implementations. >-- >Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" > {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy > "This is my mistake. Let me make it good." -R.E.M. K. C. Lee "Don't quote me on that..."