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From: ssave@ole.UUCP (Shailendra Save)
Newsgroups: sci.electronics
Subject: Re: ECL logic computers ?
Message-ID: <2045@ole.UUCP>
Date: 27 Jun 91 17:16:01 GMT
References: <2544@cluster.cs.su.oz.au>
Organization: Seattle Silicon Corp., Bellevue, WA.
Lines: 49

From article <2544@cluster.cs.su.oz.au>, by rex@cs.su.oz (Rex Di Bona):
> In article <7183@gara.une.oz.au> rbennet1@gara.une.oz.au (Robert Bennetts) writes:
>> Hi,
>>     can anybody out there tell me why ECL logic is not used to construct
>> computers (to my knowledge anyway)
> 50MHz) at various times, but it still goes. You can buy a CMOS part
> from Brooktree (a video DAC) that runs at up to 130Mhz or so, and I
> have heard of a 200Mhz CMOS processor (DOD, but this might be an urban
> myth :-)
> So, the reason you don't see too many ECL machines out there is that
> they would be a bigger headache to run, and cost MUCH more, and that
> CMOS machines are catching up anyway! (The new HP snake machines, the
> MIPS R4000 technology, and the RS6000 for example)

     I think that the prime reason that people are not designing in
  ECL is because of power-dissipation problems. At very high
  frequencies, CMOS power dissipation will also be too high. 
     The other reason why people do not use ECL, is that you need a 
  translation time to convert the signals from ECL to TTL (or CMOS)
  levels. This in itself requires some time, and some interfacing.
  At very high freq., this gets quite involved. ECL requires a Vee,
  which is a negative voltage. So now you have to worry about three
  power lines.
     ECL though a very fast technology, suffers from power problems.
  The other alternatives, ie. Gallium Arsenide (GaAs) and super het
  junction (Si-Ge) provide higher speeds with lower power consumption.
  Each has its own disadvantages. GaAs is too brittle, and tend
  to crack from thermal stresses. But then it is so rad-hard, that 
  almost all micro-frequency applications of space are done using
  GaAs. 
     The most common, the Cray supers, run at a clock of 2ns. Of
  course, it uses GaAs. Convex also uses GaAs, but has higher levels
  of integration than the Cray tech.  Which also reminds me, that 
  technologies like CMOS are layer compatible, while GaAs, ECl etc
  are not. This means that it is much harder to have a technology
  independent silicon (read semiconductor) compiler for all the GaAs
  technologies. Some new semis like InPs show much higher speeds,
  but the tech. is still infant.
> 
> Also, when I was last designing chips (ages ago now) the design tools
> knew much more about CMOS (and NMOS :-) than about ECL, so it was
> easier to get that chip fabricated.
> --------
> Rex di Bona (rex@cs.su.oz.au)
> Penguin Lust is NOT immoral

  Shailendra
  ssave@caen.engin.umich.edu
  sumax!ole.uucp!ssave