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From: mjl@ritcv.UUCP (Mike Lutz)
Newsgroups: net.micro
Subject: Re: Pyramid 90x
Message-ID: <462@ritcv.UUCP>
Date: Wed, 10-Aug-83 14:56:53 EDT
Article-I.D.: ritcv.462
Posted: Wed Aug 10 14:56:53 1983
Date-Received: Thu, 11-Aug-83 04:53:10 EDT
References: mddc.209
Lines: 11

There's an article on the Pyramid 90x in the August 11 issue of
Electronics, pp. 149-150.  It seems to be a commercial approximation to
the RISC I from Berkeley.  It's a load/store architecture, has 32
addressable registers within each function/procedure, and uses the RISC
I overlapping register windows to provide for efficient parameter
passing and function invocation.  It's not a VLSI device like RISC;
instead it's TTL-based using microcoded control.  Pyramid is quoting a
2-5 factor of improvement over an 11/780.

Mike Lutz
{allegra,seismo}!rochester!ritcv!mjl