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From: phil@amd70.UUCP (Phil Ngai)
Newsgroups: net.micro
Subject: Re:  S-100 bus faster than Multibus?
Message-ID: <3295@amd70.UUCP>
Date: Thu, 1-Sep-83 22:34:12 EDT
Article-I.D.: amd70.3295
Posted: Thu Sep  1 22:34:12 1983
Date-Received: Sat, 3-Sep-83 06:55:41 EDT
References: <4561@sri-arpa.UUCP>, <105@dual.UUCP>
Organization: AMD, Santa Clara, CA
Lines: 8

What is all this stuff about the clock rate of the Multibus? The basic
data transfers are done asynchronously, with a minimum of 200 nS per 16
bit word. If the slave needs more time, the master waits. As soon as
transfer acknowledge (XACK) is returned, the master terminates the cycle.
Bus exchange is done synchronously using a 10 MHz clock.

	Phil Ngai
	Advanced Micro Devices